File List
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Lecture 21 - SHIFT REGISTERS.flv 118.33 MB
Lecture 4 - Combinatioal Circuits.flv 115.82 MB
Lecture 20 - UP_DOWN COUNTERS.mp4 114.95 MB
Lecture 9 - Boolean Function Minimization.flv 114.27 MB
Lecture 2 - Introduction to Digital Circuits.flv 111.45 MB
Lecture 31 - Programmable Logic Devices.flv 107.4 MB
Lecture 13 - voltage regulation.flv 107.33 MB
Lecture 3 - Digital Logic - I.flv 106.03 MB
Lecture - 24 Pipelined Processor Design Basic Idea.flv 104.73 MB
Lecture 33 - Design using Programmable Logic Devices.flv 102.98 MB
Lecture 4 - Digital Logic - II.flv 101.63 MB
Lecture 1 - Introduction to Digital Circuits.flv 98.3 MB
Lecture 5 - Logic Simplification.flv 97.03 MB
Lecture 13 - Subtractors.flv 97.01 MB
Lecture 25 - nMOS Logic Circuits(cont..,); CMOS _Introduction.flv 94.9 MB
Lecture 1I L Technology.flv 94.88 MB
Lecture 27 - .C MOS NAND,NOR and Other Gates Clocked CMOS.flv 94.73 MB
Lecture 11 - Arithmetic Circuits.flv 94.01 MB
Lecture 8 - Karnaugh Map Minimization Using Maxterms.flv 93.96 MB
Lecture 18 - ECL Basic Operation.flv 93.71 MB
Lecture 18 - J-K and T Flip Flops.flv 92.71 MB
Lecture 8 - Boolean Function Minimization.flv 92.48 MB
Lecture 14 - Design of Subtractor Circuits.flv 91.52 MB
Lecture 24 - nMOS Logic Circuits.flv 90.82 MB
Lecture 24 - SYNCHRONOUS SEQUENTIAL CIRCUITS.flv 90.57 MB
Lecture 6 - Boolean Algebra.flv 89.66 MB
Lecture 32 - Design using Programmable Logic Devices.flv 89.17 MB
Lecture 6 - Schottky Transistor.flv 88.61 MB
Lecture 7 - Specifications of Logic Circuits.flv 87.81 MB
Lecture 5 - Digital Logic - III.flv 87.69 MB
Lecture 5 - Review of Flip-Flops.flv 86.88 MB
Lecture 17 - S-R_J-K and D Flip Flops.flv 86.21 MB
Lecture 6 - Karnaugh Maps And Implicants.flv 85.65 MB
Lecture 8 - Qualitative discussion on TTL Circuits.flv 83.73 MB
Lecture 3 - Combinational Logic Basics.flv 83.64 MB
Lecture 16 - Dc Motor Speed Control - Introduction.flv 82.25 MB
Lecture 22 - Application of Shift Registers.flv 80.67 MB
Lecture 7 - Logic Minimization Using Karnaugh Maps.flv 80.5 MB
Lecture 12 - Combinational Circuit Design.flv 79.24 MB
Lecture 30 - Encoders and Decoders.flv 79.01 MB
Lecture 19 - Triggering Mechanisms of Flip Flops and Counters.flv 78.77 MB
Lecture 29 - MULTIPLEXER BASED DESIGN.flv 76.04 MB
Lecture - 34 Input Output Subsystem Interfaces and buses.flv 69.73 MB
Lecture 19 - Processor Design - Simple Design.flv 68.25 MB
Lecture 21 - Processor Design - Control for Multi Cycle.flv 67.25 MB
Lecture 10 - Boolean Function Minimization.flv 66.03 MB
Lecture 7 - Boolean Algebra.flv 63.98 MB
Lecture 4 - Sources.flv 61.23 MB
Lecture 13 - Design of ADDER Circuits.flv 61.2 MB
Lecture - 33 Input Output Subsystem Introduction.flv 60.62 MB
Lecture 18 - Processor Design.flv 55.6 MB
Lecture 5 - Kirchoffs Law.flv 53.56 MB
Lecture 5 - Kirchoff's Law.flv 53.56 MB
Lecture 20 - processor design multi cycle approach.flv 51.84 MB
Lecture 17 - Processor Design - Introduction.flv 42.85 MB
Lecture 2 - How Program Will be Executed in C Language ...flv 5.75 MB
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